Compiler Design online videos


  • Videos 86
  • Duration 6:25:10
  • Branch CSE/IT
  • Language English
Course Description

This course describes the steps and algorithms which are used by language translators. Also, it gives an understanding of the language-translation peculiarities by designing a complex translator for a mini-language.

Recommended For

B.E/B.Tech Computer Science Engineering/ Information Technology


Learning Outcomes
    • Ability to understand the design of a compiler, given the features of the languages.
    • Ability to implement practical aspects of automata theory.
    • Gain knowledge of powerful compiler generation tools.


    • UNIT 1 Overview of compiler: Overview of compiler- part 1, Overview of compiler- part 2, Overview of compiler- part 3, EXAMPLE FOR PHASES, REGULAR GRAMER EXPRESSIONS, PASS & PHASES OF TRANSLATION & INTERPRETATION, BOOT STRAPPING, Context free grammars, Context free grammars part 1, Derivation, Top down parsing, Handling ambiguous grammar, Types of parsing, Preprocessing step for predictiove parsing, LL (1), LL (1) part 1
    • UNIT 2 Bottom up Parsing: Shift reducing parsing, Example Of Shift Reduce Parser, LR Parser, Example For SLR- part 1, Example For SLR- part 2, CLR Method- part 1, CLR Method- part 2, CLR Method- part 3, LALR Parsing-part 1, LALR Parsing-part 2, Handling ambiguous grammar & YACC
    • UNIT 3 Semantic analysis & Symbol tables: Intermediate code generater, Constructing syntax tree, Implementation of three address code- part 1, Implementation of three address code- part 2 & Attributed grammar, Examples of synthesized and inherited attributes, Type checking, Symbol table format, Block structures & non block structures & activation records, Storage allocation & scope of access to nonlocal names
    • UNIT 4 Code optimization: Code optimization & scope of optimization & local optimization, Local optimization, Strength reduction, Flow graphs, Copy propagation, DAG representation-part 1, DAG representation-part 2
    • UNIT 5 Object Code Generation: Code generation & object code forms, Assembler code, Machine dependent code generation & Register allocation & assignment, Global register allocation, EG for Usage count, Register allocation & assignment - part 1, Register allocation & assignment - part 2, Generic code generation algorithm, DAG using registers


Mr. G. Rajesh M.Tech, (Ph. D)

Rajesh has a master's degree in Computer Science and Engineering from JNTU Hyderabad. He has over a decade of experience in teaching at various reputed colleges in Hyderabad. He is currently on an international assignment at Bule Hora University in Ethiopia as an assistant professor. Rajesh has published several articles in international journals on compiler design about new automation tools.